1
/ 10
LOW
CVSS:4.0/AV:L/AC:L/AT:P/PR:L/UI:A/VC:N/VI:N/VA:L/SC:N/SI:N/SA:N
Description
The Secure Flag passed to Versal™ Adaptive SoC’s Arm® Trusted Firmware for Cortex®-A processors (TF-A) for Arm’s Power State Coordination Interface (PSCI) commands were incorrectly set to secure instead of using the processor’s actual security state. This would allow the PSCI requests to appear they were from processors in the secure state instead of the non-secure state.
Basic Information
ID
CVE-2025-54515
Source
AMD
Published
Nov 23, 2025 at 17:15
Affected Product
Vendor
AMD
Product
Versal™ Adaptive SoC Devices
Version
2025.2